We will first look at the digital to analog converter(DAC) circuit and then we will the analog to digital converter(ADC). This is because the ADC has D2C in its internal circuit and ADC depends on DAC for its operation.
DAC(really really fast as compared to the ADC): All the bits that are going to be converted in analog value, represented as a switch. If the bit is zero the corresponding switch will be OFF and ON for bit equal to 1. Depending upon the bits (state of the switches) there will be a voltage generated at the output of the opamp and that is nothing but the analog value corresponding to the bit represented digital value.
DAC Circuit |
- The approximation circuit block contains the DAC.
- ADC uses two analog buffer to make sure that there is no loading problem and here analog buffer is made of opamp because it has very high input impedance.
- FET samples the analog value coming from the first analog buffer and charges the capacitor when the FET is ON to hold the value.
- Then the approx. circuit uses the voltage available in capacitor via an analog buffer.
- Digital buffer holds the bits while the next conversion is taking place in approx. circuit block.
Successive Approximation Analog to Digital Converter (Approx. Circuit Block):
- Vx is the voltage to be converted and Ain is the corresponding converted value. While, Vr is the reference value and it starts with Vr=0.
- If Vx>Vr then V0=+5 (why +5V?, because of logic level)
- if Vx<=Vr then V0=0
- SAL block updates the next bit in Ain to reflect V0.
- Vr is generated from the D/A convertion of Ain.
- Repeat this process from 2 to 10bits.
The above figure contains the plot of Vx vs time. Where, the dotted line represents the Vx= voltage to be converted into digital and red line indicates the reference voltage Vr.
- At t=t-minus,Vr=0V and Vx is at 3.39V and hence at t=t-plus, V0=+5V and V0 forms the first bit from MSB equal to 1.
- At t=t1-minus, Vr(generated from DAC)=(0+5)/2=2.5V and Vx=3.39V and hence at t=t-plus, V0=+5 meaning second bit from MSB equal to 1.
- At t=t2-minus, Vr=(2.5+5)/2=3.75V and Vx=3.39V and hence at t=t-plus, V0=0 and forms the thirst bit from MSB equal to 0.
- It keeps repeating the process by the number equal to the ADC-bit size.
- Each time the unknown interval is cut in half.
- For a 10bit ADC, This process repeats 10 number of times.
- Atmega328 takes 13clock cycle to convert a number, 10 clock cycles to form 10bits and then 3 clock cycles to manage and process those bits.
- Hence the Speed of ADC depends upon the clock we are using for ADC peripheral.
- There are 6 channels, multiplexed and single ended with an accuracy of plus-minus 2LSB
- Takes 13 clock cycles to convert an analog value into digital.
- Input voltage range from 0-Vcc.
Complete ADC Block for Atmega328 |
- ADC Multiplexer select (ADMUX)
- ADC CTRL and Status register (ADCSRA)
- ADC Data register (ADCH/ADCL)
- Single conversion mode (on demand)
- Free running mode (continuously)
- Clocked conversion (periodically, requires ISR)
- Can be clocked or unclocked.
- When clocked, an ISR is required.
- Clocked or not, the ADC performs one conversion after another.
- This can be an energy hog. Because doing ADC conversion continuously consumes power.
- void setup(){
- ADMUX = 0b01000011;
- ADCSRA = 0b10100111;//here ADSC is zero
- ADCSRB = 0bx00;
- DIDR0 = 0b00001000;
- SDCSRA |= 0b01000000;//start conversion;//here ADSC is setting to 1
- }
- void loop(){
- int highbyte, lowbyte,value;
- highbyte = ADCH;//ADCH contains two MSBs out of 10bits.
- lowbyte = ADCL;//ADCL contains 8 remaining lower bits out of 10bits.
- value = (highbyte<<8)|lowbyte;
- }
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